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Description
Title: | An efficient and accurate timing macro-modeling algorithm for large hierarchical designs |
Author(s): | Lai, Tin-Yin |
Advisor(s): | Wong, Martin D. F. |
Department / Program: | Electrical & Computer Eng |
Discipline: | Electrical & Computer Engr |
Degree Granting Institution: | University of Illinois at Urbana-Champaign |
Degree: | M.S. |
Genre: | Thesis |
Subject(s): | Timing macro-modeling
Algorithm Timing analysis |
Abstract: | Ever-increasing circuit design complexity is driving the need for fast and accurate macro-modeling algorithms to accelerate hierarchical timing. We introduce LibAbs, an effective macro-modeling algorithm that efficiently supports high accuracy, high compression rate, and multi-threading. LibAbs applies tree-based graph reduction techniques to reduce the model size with accuracy values comparable to those of the flat model under a multi-threaded environment. LibAbs outperforms existing tools including the top winners from the TAU 2016 macro-modeling contest in terms of model size, accuracy, and runtime on industry benchmarks. The in-context usage of our abstracted model has also demonstrated promising performance for timing-driven optimizations in large hierarchical designs. |
Issue Date: | 2017-06-19 |
Type: | Text |
URI: | http://hdl.handle.net/2142/98236 |
Rights Information: | Copyright 2017 Tin-Yin Lai |
Date Available in IDEALS: | 2017-09-29 2019-09-30 |
Date Deposited: | 2017-08 |
This item appears in the following Collection(s)
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Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering -
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois