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        <identifier>oai:www.ideals.illinois.edu:2142/101643</identifier>
        <datestamp>2023-07-11</datestamp>
        <setSpec>col_2142_5131</setSpec>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Radhakrishnan, Chandrasekhar</dc:contributor>
          <dc:contributor>Hanumolu, Pavan K.</dc:contributor>
          <dc:creator>Yeoh, Mei Ling</dc:creator>
          <dc:date>2018-09-27T16:28:02Z</dc:date>
          <dc:date>2018-09-27T16:28:02Z</dc:date>
          <dc:date>2020-09-28T09:15:27Z</dc:date>
          <dc:date>2018-05-21</dc:date>
          <dc:date>2018-08</dc:date>
          <dc:description>Analysis and performance tradeoffs of an R-2R digital-to-analog converter with equal current switching are presented. It is shown that for such architecture, the active area of the DAC grows as the resolution increases due to higher matching requirement needed. A fully binary-weighted DAC suffers from well-known differential linearity problems and large switching glitches at the output, while a fully thermometer-coded DAC benefits from the relaxed DNL but requires a large area to realize. The R-2R DAC with equal current switching into the ladder network can be implemented using very low currents with more relaxed current matching requirements over the binary-weighted DAC, and less area over the thermometer-coded DAC.</dc:description>
          <dc:description>Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2020-08-01</dc:description>
          <dc:description>The student, Mei Ling Yeoh, accepted the attached license on 2018-05-18 at 19:47.</dc:description>
          <dc:description>The student, Mei Ling Yeoh, submitted this Thesis for approval on 2018-05-18 at 20:26.</dc:description>
          <dc:description>This Thesis was approved for publication on 2018-05-21 at 10:13.</dc:description>
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LICENSE.txt: 4210 bytes, checksum: 40d13a0331b344491d8f8627070ab759 (MD5)
  Previous issue date: 2018-05-21</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 107740
Lift date: 2020-09-27T16:28:07Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 107740
Lift date: 2020-09-27T16:30:34Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 107740
Lift date: 2020-09-27T16:31:43Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 107740
Lift date: 2020-09-27T16:34:29Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>U of I Only Restriction Lifted for Item 107740 on 2020-09-28T09:15:27Z.</dc:description>
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          <dc:identifier>http://hdl.handle.net/2142/101643</dc:identifier>
          <dc:language>en</dc:language>
          <dc:rights>Copyright 2018 Mei Ling Yeoh</dc:rights>
          <dc:subject>R-2R, DAC, INL, DNL</dc:subject>
          <dc:title>Analysis of R-2R digital-to-analog converter with equal current switching</dc:title>
          <dc:type>text</dc:type>
          <dc:type>text</dc:type>
          <degree>
            <department>Electrical &amp; Computer Eng</department>
            <discipline>Electrical &amp; Computer Engr</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Thesis</level>
            <name>M.S.</name>
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