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        <identifier>oai:www.ideals.illinois.edu:2142/101830</identifier>
        <datestamp>2023-07-11</datestamp>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Bailey, Michael D</dc:contributor>
          <dc:creator>Clark, Eric James</dc:creator>
          <dc:date>2018-09-27T16:47:36Z</dc:date>
          <dc:date>2018-09-27T16:47:36Z</dc:date>
          <dc:date>2020-09-28T09:15:13Z</dc:date>
          <dc:date>2018-07-19</dc:date>
          <dc:date>2018-08</dc:date>
          <dc:description>Since the widespread adoption of the internet, computer security has become one of the primary concerns of computer systems engineers, who are often faced with a choice between increased performance and stronger security policies. Many advancements in computer security impose a performance penalty. One such advancement, control-flow integrity (CFI), offers immunity to code-reuse attacks but slows down software that enforces CFI. In this work, we present a hardware monitor design that utilizes hardware support for instruction tracing to detect code-reuse attacks. The monitor is small in hardware size, uses low power, and does not decrease software performance.</dc:description>
          <dc:description>Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2020-08-01</dc:description>
          <dc:description>The student, Eric Clark, accepted the attached license on 2018-07-19 at 10:07.</dc:description>
          <dc:description>The student, Eric Clark, submitted this Thesis for approval on 2018-07-19 at 10:14.</dc:description>
          <dc:description>This Thesis was approved for publication on 2018-07-19 at 10:40.</dc:description>
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CLARK-THESIS-2018.pdf: 629594 bytes, checksum: 26739c5a366c0176c0767ec26aca0270 (MD5)
LICENSE.txt: 4207 bytes, checksum: f91087ad7646eb05a5614b96d681e2cb (MD5)
  Previous issue date: 2018-07-19</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 107931
Lift date: 2020-09-27T16:47:41Z
Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>Limited Restriction Lifted for Item 107931 on 2020-09-28T09:15:13Z.</dc:description>
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          <dc:identifier>http://hdl.handle.net/2142/101830</dc:identifier>
          <dc:language>en</dc:language>
          <dc:rights>Copyright 2018 Eric James Clark</dc:rights>
          <dc:subject>control-flow integrity</dc:subject>
          <dc:subject>code-reuse attack</dc:subject>
          <dc:subject>trace</dc:subject>
          <dc:subject>security</dc:subject>
          <dc:subject>ARM</dc:subject>
          <dc:subject>FPGA</dc:subject>
          <dc:subject>logic design</dc:subject>
          <dc:title>Trace-based hardware control flow signature checking</dc:title>
          <dc:type>text</dc:type>
          <dc:type>text</dc:type>
          <degree>
            <department>Electrical &amp; Computer Eng</department>
            <discipline>Electrical &amp; Computer Engr</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Thesis</level>
            <name>M.S.</name>
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