2026-09-22T08:04:16Z https://www.ideals.illinois.edu/oai-pmh

oai:www.ideals.illinois.edu:2142/104741 2023-07-11 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2019-08-22 without embargo terms The student, Sungmin Lim, accepted the attached license on 2019-01-25 at 11:04. The student, Sungmin Lim, submitted this Thesis for approval on 2019-01-25 at 12:02. This Thesis was approved for publication on 2019-01-25 at 15:13. DSpace SAF Submission Ingestion Package generated from Vireo submission #13369 on 2019-08-22 at 14:39:29 Made available in DSpace on 2019-08-23T19:51:25Z (GMT). No. of bitstreams: 2 LIM-THESIS-2019.pdf: 3025081 bytes, checksum: 9a6cc972b3b3df7aea9c67338a06af4b (MD5) LICENSE.txt: 4208 bytes, checksum: 96eeee175a83cf11e146c24e0852c36b (MD5) Previous issue date: 2019-01-25 application/pdf http://hdl.handle.net/2142/104741 en Shanbhag, Naresh R. Lim, Sungmin 2019-08-23T19:51:25Z 2019-08-23T19:51:25Z 2019-01-25 2019-05 Recent emerging machine learning applications such as Internet-of-Things and medical devices require to be operated in a battery-powered platform. As the machine learning algorithms involve heavy data-intensive computations, interest in energy-efficient and low-delay machine learning accelerators is growing. Because there is a trade-off between energy and accuracy in machine learning applications, it is a reasonable direction to provide scalable architecture which has diverse operating points. This thesis presents a high-accuracy in-memory realization of the AdaBoost machine learning classifier. The proposed classifier employs a deep in-memory architecture (DIMA), and employs foreground calibration to compensate for PVT variations and improve task-level accuracy. The proposed architecture switches between a high accuracy/high power (HA) mode and a low power/low accuracy (LP) mode via soft decision thresholding to provide an elegant energy-accuracy trade-off. The proposed realization achieves an EDP reduction of 43X over a digital architecture at an iso-accuracy of 95% for the MNIST dataset, which is an improvement of 5% over a previous in-memory implementation of AdaBoost. Copyright 2019 Sungmin Lim machine learning, mixed-signal accelerator, adaptive boosting, in-memory computing, energy-efficient. A hierarchical adaptively boosted in-memory classifier in 6T SRAM text text Electrical & Computer Eng Electrical & Computer Engr University of Illinois at Urbana-Champaign Thesis M.S.