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        <identifier>oai:www.ideals.illinois.edu:2142/106362</identifier>
        <datestamp>2023-07-11</datestamp>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Snir, Marc</dc:contributor>
          <dc:contributor>Snir, Marc</dc:contributor>
          <dc:contributor>Olson, Luke N</dc:contributor>
          <dc:contributor>Garzaran, Maria</dc:contributor>
          <dc:contributor>Scogland, Thomas R. W.</dc:contributor>
          <dc:creator>Brooks, Alex</dc:creator>
          <dc:date>2020-03-02T22:15:03Z</dc:date>
          <dc:date>2020-03-02T22:15:03Z</dc:date>
          <dc:date>2022-03-03T10:15:13Z</dc:date>
          <dc:date>2019-12-03</dc:date>
          <dc:date>2019-12</dc:date>
          <dc:description>Hardware heterogeneity is becoming an increasingly common feature in high-performance computing systems. Unfortunately, while these systems may offer new technologies in memory and computation, the general trend of memory performance is falling behind. With the added complexities of heterogeneous systems, achieving good memory performance is now becoming more difficult. Since different memory technologies exhibit various performance characteristics, careful memory management is required to consider tradeoffs in latency, bandwidth, capacity, and power. Application behavior, including data access patterns, data sizes, and operation types can indicate which characteristics limit the performance of an operation. However, understanding this information and using it to perform optimizations can be a difficult task. We expect this problem to become increasingly prevelent as the memory stack continues to change and expand. In this dissertation we present a solution to managing memory for these heterogeneous systems in an automated manner. We demonstrate its use on several applications and machine types, showcasing the benefit, flexibility, and expandability of the framework.</dc:description>
          <dc:description>Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2021-12-01</dc:description>
          <dc:description>The student, Alex Brooks, accepted the attached license on 2019-12-03 at 08:25.</dc:description>
          <dc:description>The student, Alex Brooks, submitted this Dissertation for approval on 2019-12-03 at 08:32.</dc:description>
          <dc:description>This Dissertation was approved for publication on 2019-12-03 at 09:24.</dc:description>
          <dc:description>DSpace SAF Submission Ingestion Package generated from Vireo submission #14658 on 2020-02-28 at 17:22:54</dc:description>
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BROOKS-DISSERTATION-2019.pdf: 1316876 bytes, checksum: 3edb61e88372e977073eec1e26de77a8 (MD5)
LICENSE.txt: 4208 bytes, checksum: a05ad641e02b04b362db451590333565 (MD5)
  Previous issue date: 2019-12-03</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 113904
Lift date: 2022-03-02T22:15:21Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 113904
Lift date: 2022-03-02T22:18:25Z
Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system</dc:description>
          <dc:description>U of I Only Restriction Lifted for Item 113904 on 2022-03-03T10:15:13Z.</dc:description>
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          <dc:identifier>http://hdl.handle.net/2142/106362</dc:identifier>
          <dc:language>en</dc:language>
          <dc:rights>Copyright 2019 Alex Brooks</dc:rights>
          <dc:subject>heterogeneous</dc:subject>
          <dc:subject>memory</dc:subject>
          <dc:subject>system</dc:subject>
          <dc:subject>automated</dc:subject>
          <dc:subject>analysis</dc:subject>
          <dc:subject>profiling</dc:subject>
          <dc:subject>framework</dc:subject>
          <dc:subject>access</dc:subject>
          <dc:subject>patterns</dc:subject>
          <dc:subject>latency</dc:subject>
          <dc:subject>bandwidth</dc:subject>
          <dc:title>Automating heterogeneous memory management</dc:title>
          <dc:type>text</dc:type>
          <dc:type>text</dc:type>
          <degree>
            <department>Computer Science</department>
            <discipline>Computer Science</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Dissertation</level>
            <name>Ph.D.</name>
          </degree>
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