2026-09-21T16:57:36Z https://www.ideals.illinois.edu/oai-pmh

oai:www.ideals.illinois.edu:2142/108134 2023-07-11 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Hanumolu, Pavan Kumar Hanumolu, Pavan Kumar Shanbhag, Naresh Schutt-Aine, Jose Zhou, Jin Khashaba, Amr Tarek Ahmed Abdelrazik 2020-08-26T23:57:20Z 2020-08-26T23:57:20Z 2022-08-26T23:58:55Z 2020-04-29 2020-05 Thanks to their small area and multiphase output, ring oscillators (ROs) play important roles in many systems. In this thesis, we study, analyze and propose novel solutions for RO-based applications. We cover three applications for ROs, namely, wireline clock generation, temperature-compensated references, and sensor interfaces. We start by focusing on RO-based clock generation where the phase noise is degraded due to jitter accumulation. We present a synthesizer architecture that uses a low-noise passive multiphase generator which does not suffer from jitter accumulation and digital background calibration to correct for errors in the multiphase generator. The synthesizer uses a standard 54MHz crystal to synthesize a 245fsrms 5GHz output while consuming only 8.2mW. For the frequency reference part, we propose a novel temperature-compensated oscillator (TCO) using a RO locked to RC reference using a frequency locked loop (FLL). High-resolution generated sequences are used to clock switched resistors of opposite temperature coefficients which serve as a reference resistor for the FLL. This results in excellent temperature coefficient of 8.4ppm/◦C from −40◦C to 85◦C while relying on only 2-point trim operation. The TCO also achieves a supply sensitivity of 80ppm/V and power efficiency of 1μW/MHz. For using the RO as a sensor interface, we propose a RO-based temperature sensor where the output period of the RO is locked to an RC sensor using a FLL. We propose a voltage mode FLL structure which guarantees very small area and low noise thanks to a novel 3-phase frequency-to-voltage converter which eliminates charge pump noise. The quantization noise is rejected by passing the 10 phases of the RO to an edge combiner. This allows building a compact temperature sensor occupying 8800μm2 area and achieving ±0.5◦C peak to peak inaccuracy after 1-point trim and 92fJ·K2 resolution FoM. Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2022-05-01 The student, Amr Khashaba, accepted the attached license on 2020-04-29 at 10:31. The student, Amr Khashaba, submitted this Dissertation for approval on 2020-04-29 at 10:40. This Dissertation was approved for publication on 2020-04-29 at 14:27. DSpace SAF Submission Ingestion Package generated from Vireo submission #15111 on 2020-08-25 at 17:28:28 Made available in DSpace on 2020-08-26T23:57:20Z (GMT). No. of bitstreams: 2 KHASHABA-DISSERTATION-2020.pdf: 4576313 bytes, checksum: 304cee2c04d0d92ab8087d6c99ab4384 (MD5) LICENSE.txt: 4209 bytes, checksum: d36467d83cfc06a9d9debab62a68931e (MD5) Previous issue date: 2020-04-29 Embargo set by: Seth Robbins for item 115746 Lift date: 2022-08-26T23:57:28Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system Embargo set by: Seth Robbins for item 115746 Lift date: 2022-08-26T23:58:55Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system U of I Only application/pdf http://hdl.handle.net/2142/108134 en Copyright 2020 Amr Khashaba Ring oscillator, multiphase generation, PLL, FLL, temperature sensor, temperature compensated oscillator Ring oscillators for high performance clock synthesis and sensor interfaces text Thesis Electrical & Computer Eng Electrical & Computer Engr University of Illinois at Urbana-Champaign Dissertation Ph.D.