2026-09-20T04:04:55Z https://www.ideals.illinois.edu/oai-pmh

oai:www.ideals.illinois.edu:2142/117690 2023-07-11 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Rosenbaum, Elyse 2022-12 application/pdf en text Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01 The student, Shudong Huang, accepted the attached license on 2022-12-08 at 16:49. The student, Shudong Huang, submitted this Thesis for approval on 2022-12-08 at 16:55. This Thesis was approved for publication on 2022-12-09 at 13:03. DSpace SAF Submission Ingestion Package generated from Vireo submission #18787 on 2023-04-12 at 08:14:49 Compact model of ESD diode for circuit simulation Huang, Shudong 2022-12-09 Esd Integrated Circuits This work presents non-quasi-static compact models of P-well and N-well ESD-protection diodes for circuit simulation. The ESD N-well diode model uses a formulation similar to the SPICE Gummel-Poon BJT model to capture the essential BJT effects. The underlying physical basis of the models as well as the parameter extraction methodology are discussed. Diode test structures were fabricated in 65-nm CMOS technology. The measurement results confirm that the models accurately predict the transient behavior of diodes during both turn-on and turn-off. Thesis eng https://hdl.handle.net/2142/117690 Copyright 2022 Shudong Huang M.S. Thesis Electrical & Computer Engr University of Illinois at Urbana-Champaign Electrical & Computer Eng