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        <identifier>oai:www.ideals.illinois.edu:2142/11989</identifier>
        <datestamp>2023-07-10</datestamp>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Schutt-Ainé, José E.</dc:contributor>
          <dc:creator>Jayaraman, Srivatsan</dc:creator>
          <dc:date>2009-06-01T16:07:25Z</dc:date>
          <dc:date>2009-06-01T16:07:25Z</dc:date>
          <dc:date>2011-06-02T10:00:09Z</dc:date>
          <dc:date>2009-06-01T16:07:25Z</dc:date>
          <dc:description>As the clock rates of microprocessors keep increasing, high data rate input/output (IO) should be designed to realize their maximum benefit. However, designing robust, low power, high speed IO links is very challenging due to the increased transmission line loss, cross talk, and signal distortion resulting in intersymbol interference. Synchronous sampling is often employed to overcome these challenges. However, synchronous sampling makes use of a high purity oscillator to minimize the clock jitter. This thesis focuses on the design of a high purity, low power, voltage controlled oscillator to be used as part of the clock data recovery system in a 25 Gb/s serial IO link.</dc:description>
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Item is restricted until 2011-06-01T16:07:37Z</dc:description>
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Dissertations and Theses - Electrical and Computer Engineering (ID: 446)
University of Illinois Dissertations and Theses (ID: 204)
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          <dc:identifier>http://hdl.handle.net/2142/11989</dc:identifier>
          <dc:rights>Copyright 2009 Srivatsan Jayaraman</dc:rights>
          <dc:subject>Voltage controlled oscillator</dc:subject>
          <dc:subject>Differential oscillator</dc:subject>
          <dc:title>On-Chip Voltage Controlled Oscillator for Clock Data Recovery Systems</dc:title>
          <dc:date>2009-5</dc:date>
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            <department>Electrical and Computer Engineering</department>
            <discipline>Electrical and Computer Engineering</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Thesis</level>
            <name>M.S.</name>
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