<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/oai-pmh.xsl"?>
<OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd">
  <responseDate>2026-09-20T18:29:14Z</responseDate>
  <request identifier="oai:www.ideals.illinois.edu:2142/13395" metadataPrefix="etdms" verb="GetRecord">https://www.ideals.illinois.edu/oai-pmh</request>
  <GetRecord>
    <record>
      <header>
        <identifier>oai:www.ideals.illinois.edu:2142/13395</identifier>
        <datestamp>2023-07-10</datestamp>
        <setSpec>col_2142_10761</setSpec>
        <setSpec>col_2142_5131</setSpec>
        <setSpec>com_2142_10755</setSpec>
        <setSpec>com_2142_234</setSpec>
        <setSpec>com_2142_5130</setSpec>
      </header>
      <metadata>
        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>King, Samuel T.</dc:contributor>
          <dc:contributor>Torrellas, Josep</dc:contributor>
          <dc:contributor>Snir, Marc</dc:contributor>
          <dc:contributor>Hwu, Wen-Mei W.</dc:contributor>
          <dc:contributor>Zhou, Yuanyuan</dc:contributor>
          <dc:contributor>Von Praun, Christoph</dc:contributor>
          <dc:creator>Montesinos Ortego, Pablo</dc:creator>
          <dc:date>2009-08-06T18:32:59Z</dc:date>
          <dc:date>2009-08-06T18:32:59Z</dc:date>
          <dc:date>2009-08-06</dc:date>
          <dc:description>With the arrival of multicore chips as the commodity architecture for a wide range of
platforms, there is a growing pressure to make parallel programming the norm. Unfortunately,
most current programmers find parallel programming too complex. Therefore,
we need tools, models, and architectures that make multiprocessors more programmable.
One compelling way to improve programmability is to enable back-and-forth time
travel of multiprocessor execution. Such ability simplifies parallel code debugging, and is
possible using a technique called Deterministic Replay of Execution. This thesis presents
DeLorean, a novel hardware substrate for deterministic replay of multiprocessor systems.
DeLorean advances the state of the art in that it enables high-speed recording and replay
of parallel execution and in that its space requirements are orders of magnitude smaller
than those of current schemes.
To be practical, DeLorean and other hardware replay systems need to support an
environment with multiple parallel jobs running concurrently — some being recorded,
others being replayed and possibly many others running without recording or replay. To
address this issue, this thesis presents Capo, a novel software-hardware interface for practical
high-speed multiprocessor replay. It also introduces the novel abstraction of Replay
Sphere to separate the responsibilities of the hardware and software components of a replay
system. Finally, this thesis describes CapoOne, a prototype of a deterministic multiprocessor
replay system that implements Capo using Linux running on simulated DeLorean hardware.</dc:description>
          <dc:description>not peer reviewed</dc:description>
          <dc:description>Submitted by Pablo Montesinos Ortego (pmontesi@illinois.edu) on 2009-08-06T18:32:59Z
No. of bitstreams: 1
thesis-Final-distilled.pdf: 811461 bytes, checksum: 876c04ad4280de77fb39ab7e2c283ddb (MD5)</dc:description>
          <dc:description>Made available in DSpace on 2009-08-06T18:32:59Z (GMT). No. of bitstreams: 1
thesis-Final-distilled.pdf: 811461 bytes, checksum: 876c04ad4280de77fb39ab7e2c283ddb (MD5)
  Previous issue date: 2009-08-06</dc:description>
          <dc:description>unpublished</dc:description>
          <dc:identifier>http://hdl.handle.net/2142/13395</dc:identifier>
          <dc:language>en</dc:language>
          <dc:rights>Copyright 2009 Pablo Montesinos Ortego</dc:rights>
          <dc:subject>Deterministic Replay</dc:subject>
          <dc:subject>Determinism</dc:subject>
          <dc:subject>Time Travel</dc:subject>
          <dc:subject>Multiprocessors</dc:subject>
          <dc:subject>Debuggability</dc:subject>
          <dc:subject>Programmability</dc:subject>
          <dc:subject>Chunk-based Execution and Replay</dc:subject>
          <dc:title>Practical Time Travel of Multiprocessor Systems</dc:title>
          <dc:type>Dissertation / Thesis</dc:type>
          <dc:type>text</dc:type>
          <degree>
            <department>Computer Science</department>
            <discipline>Computer Science</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Dissertation</level>
            <name>Ph.D.</name>
          </degree>
        </thesis>
      </metadata>
    </record>
  </GetRecord>
</OAI-PMH>
