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Iyer, Ravishankar K. Choi, Gwan Seung 2011-05-07T11:55:45Z 2011-05-07T11:55:45Z 10000-01-01 1994 This thesis describes simulation approaches to conduct fault sensitivity and wear-out failure analysis of VLSI systems. A fault-injection approach to study transient impact in VLSI systems is developed. Through simulated fault injection at the device level and subsequent fault propagation at the gate, functional and software levels, it is possible to identify critical bottlenecks in dependability. Techniques to speed up the fault simulation and to perform statistical analysis of fault impact are developed. A wear-out simulation environment is also developed to closely mimic dynamic sequences of wear-out events in a device through time, to localize weak location/aspect of target chip and to allow generation of Time-to-Failure (TTF) distribution of a VLSI chip as whole. First, an accurate simulation of a target chip and its application code is performed to acquire real workload trace data on switch activity. Then, using this switch activity information, wear-out of the each component of the chip is simulated using Monte Carlo techniques. Made available in DSpace on 2011-05-07T11:55:45Z (GMT). No. of bitstreams: 2 license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9512332.pdf: 5368522 bytes, checksum: 14cf273cc19173550bce7b08caa72f48 (MD5) Previous issue date: 1994 Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T14:34:23Z Item is restricted indefinitely. Restriction data tranferred 2014-07-01T11:13:06-05:00 Original Data Group with Access UIUC Users [automated] Release Date: none Reason: ETDs are only available to UIUC Users without author permission ETDs are only available to UIUC Users without author permission U of I Only AAI9512332 (UMI)AAI9512332 http://hdl.handle.net/2142/19060 eng Copyright 1994 Choi, Gwan Seung Engineering, Aerospace Engineering, Electronics and Electrical Computer Science Fault sensitivity and wear-out analysis of VLSI systems text Electrical and Computer Engineering Electrical Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.