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        <identifier>oai:www.ideals.illinois.edu:2142/23592</identifier>
        <datestamp>2023-07-10</datestamp>
        <setSpec>col_2142_5131</setSpec>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Song, Bang-Sup</dc:contributor>
          <dc:creator>Lee, Seung-Hoon</dc:creator>
          <dc:date>2011-05-07T14:19:54Z</dc:date>
          <dc:date>2011-05-07T14:19:54Z</dc:date>
          <dc:date>10000-01-01</dc:date>
          <dc:date>1991</dc:date>
          <dc:description>Flash-type analog-to-digital converters (ADCs) have been extensively used for high-speed applications such as high-performance TVs, image recognition, radar, and medical instrumentation. However, the linearity of these state-of-the-art flash-type ADCs has been limited to 10 bits by ratio mismatch of passive components. Although techniques such as laser-trimming, self-calibration and error-averaging have been developed to achieve high matching accuracy of components, they are not readily applied to flash-type ADCs.</dc:description>
          <dc:description>This thesis proposes a direct, digital code-error, calibration technique to improve the linearity of two-step flash ADCs. When implemented in MOS technologies, this technique eliminates other errors resulting from MOS switch feedthrough, op amp offsets, and interstage gain errors. Nonlinearities of ADCs are statistically simulated considering component mismatch and other nonideal factors. A test chip has been verified by ADICE and ISPLICE3 and implemented using a 2 $\mu$m N-well CMOS technology from Analog Devices, Inc. Experimental results of the prototype show that the proposed calibration technique reduces total harmonic distortion from $-$64 dB to $-$77 dB and improves signal-to-noise ratio from 61 dB to 67 dB after calibration.</dc:description>
          <dc:description>Made available in DSpace on 2011-05-07T14:19:54Z (GMT). No. of bitstreams: 2
license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5)
9136650.pdf: 4488144 bytes, checksum: 20824cfc1b614b723edcd42697c3df90 (MD5)
  Previous issue date: 1991</dc:description>
          <dc:description>Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T15:05:31Z
Item is restricted indefinitely.</dc:description>
          <dc:description>Restriction data tranferred 2014-07-01T11:31:23-05:00
Original Data
Group with Access UIUC Users [automated]
Release Date: none
Reason: ETDs are only available to UIUC Users without author permission</dc:description>
          <dc:description>ETDs are only available to UIUC Users without author permission</dc:description>
          <dc:description>U of I Only</dc:description>
          <dc:identifier>AAI9136650</dc:identifier>
          <dc:identifier>(UMI)AAI9136650</dc:identifier>
          <dc:identifier>http://hdl.handle.net/2142/23592</dc:identifier>
          <dc:language>eng</dc:language>
          <dc:rights>Copyright 1991 Lee, Seung-Hoon</dc:rights>
          <dc:subject>Engineering, Electronics and Electrical</dc:subject>
          <dc:title>Code-error calibration techniques for two-step flash analog-to-digital converters</dc:title>
          <dc:type>text</dc:type>
          <degree>
            <department>Engineering, Electronics and Electrical</department>
            <discipline>Engineering, Electronics and Electrical</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Dissertation</level>
            <name>Ph.D.</name>
          </degree>
        </thesis>
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