<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/oai-pmh.xsl"?>
<OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd">
  <responseDate>2026-09-20T02:14:26Z</responseDate>
  <request identifier="oai:www.ideals.illinois.edu:2142/23801" metadataPrefix="etdms" verb="GetRecord">https://www.ideals.illinois.edu/oai-pmh</request>
  <GetRecord>
    <record>
      <header>
        <identifier>oai:www.ideals.illinois.edu:2142/23801</identifier>
        <datestamp>2023-07-10</datestamp>
        <setSpec>col_2142_5131</setSpec>
        <setSpec>col_2142_10761</setSpec>
        <setSpec>com_2142_5130</setSpec>
        <setSpec>com_2142_10755</setSpec>
        <setSpec>com_2142_234</setSpec>
      </header>
      <metadata>
        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Torrellas, Josep</dc:contributor>
          <dc:creator>Xia, Chun</dc:creator>
          <dc:date>2011-05-07T14:27:34Z</dc:date>
          <dc:date>2011-05-07T14:27:34Z</dc:date>
          <dc:date>10000-01-01</dc:date>
          <dc:date>1996</dc:date>
          <dc:description>With the increasing gap between processor speed and memory speed, a sophisticated memory hierarchy is key to high performance. However, the operating system tends to use the memory hierarchy poorly. This thesis presents a comprehensive characterization and optimization of the performance of multiprocessor memory hierarchies for operating systems. The operating system instruction cache misses are reduced by 81% using a code reorganization scheme tailored to the operating system, guarded sequential prefetching, and stream buffers. The operating system data cache misses are reduced by 53% using a DMA-like pipelined block transfer engine, a selective update protocol, data relocation and privatization, and data prefetching in miss hot spots. The overall OS time is reduced by 32%. The cost-performance trade-offs of the software/hardware optimization schemes are also discussed.</dc:description>
          <dc:description>Made available in DSpace on 2011-05-07T14:27:34Z (GMT). No. of bitstreams: 2
license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5)
9702719.pdf: 7263634 bytes, checksum: d2ff20e11da17cc1d8393dfe8c2d45de (MD5)
  Previous issue date: 1996</dc:description>
          <dc:description>Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T15:06:56Z
Item is restricted indefinitely.</dc:description>
          <dc:description>Restriction data tranferred 2014-07-01T11:32:10-05:00
Original Data
Group with Access UIUC Users [automated]
Release Date: none
Reason: ETDs are only available to UIUC Users without author permission</dc:description>
          <dc:description>ETDs are only available to UIUC Users without author permission</dc:description>
          <dc:description>U of I Only</dc:description>
          <dc:identifier>9780591089219</dc:identifier>
          <dc:identifier>AAI9702719</dc:identifier>
          <dc:identifier>(UMI)AAI9702719</dc:identifier>
          <dc:identifier>http://hdl.handle.net/2142/23801</dc:identifier>
          <dc:language>eng</dc:language>
          <dc:rights>Copyright 1996 Xia, Chun</dc:rights>
          <dc:subject>Engineering, Electronics and Electrical</dc:subject>
          <dc:subject>Computer Science</dc:subject>
          <dc:title>Exploiting multiprocessor memory hierarchies for operating systems</dc:title>
          <dc:type>text</dc:type>
          <degree>
            <department>Engineering, Electronics and Electrical</department>
            <department>Computer Science</department>
            <discipline>Engineering, Electronics and Electrical</discipline>
            <discipline>Computer Science</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Dissertation</level>
            <name>Ph.D.</name>
          </degree>
        </thesis>
      </metadata>
    </record>
  </GetRecord>
</OAI-PMH>
