2026-09-19T14:53:32Z https://www.ideals.illinois.edu/oai-pmh

oai:www.ideals.illinois.edu:2142/24206 2023-07-10 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Kumar, Rakesh Sloan, Joseph A. 2011-05-25T15:04:15Z 2011-05-25T15:04:15Z 2011-05-25T15:04:15Z 2011-05 There have been several attempts at correcting process variation induced errors by identifying and masking these errors at the circuit and architecture level. These approaches take up valuable die area and power on the chip. As an alternative, we explore the feasibility of an approach that allows these errors to occur freely and handles them in software at the algorithmic level. In this thesis, we present a general approach to converting applications into an error tolerant form by recasting these applications as numerical optimization problems, which can then be solved reliably via stochastic optimization. We evaluate the potential robustness and energy benefits of the proposed approach using an FPGA-based framework that emulates timing errors in the floating point unit (FPU) of a Leon3 processor. We show that stochastic versions of applications have the potential to produce good quality outputs in the face of timing errors under certain assumptions. We also show that good quality results are possible for both intrinsically robust algorithms as well as fragile applications under these assumptions. Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2011-04-27T00:28:07Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 1 Sloan_Joseph.pdf: 741286 bytes, checksum: 28367891ba6e88f95d8c1fe5c91f28f5 (MD5) Made available in DSpace on 2011-05-25T15:04:15Z (GMT). No. of bitstreams: 2 Sloan_Joseph.pdf: 741286 bytes, checksum: 28367891ba6e88f95d8c1fe5c91f28f5 (MD5) license.txt: 4060 bytes, checksum: 9d72c222b550940a0b5f0f1516bba817 (MD5) http://hdl.handle.net/2142/24206 en (Copyright 2011 Joseph Augustyn Sloan) stochastic processors fault tolerance application robustification A numerical optimization-based methodology for application robustification: transforming applications for error tolerance Electrical & Computer Eng 1933 Electrical & Computer Engr 1200 University of Illinois at Urbana-Champaign Thesis M.S. PHD:Electr & Computer Eng-UIUC 10KS1200PHD