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oai:www.ideals.illinois.edu:2142/45653 2023-07-11 col_2142_8888 col_2142_5131 com_2142_8887 com_2142_234 com_2142_5130

Chen, Deming Li, Chong 2013-08-22T16:56:48Z 2013-08-22T16:56:48Z 2015-08-22T10:01:01Z 2013-08 2013-08-22T16:56:48Z 2013-08 In this paper, we introduce a reconfigurable architecture, named 3D CMOS-NEM FPGA, which utilizes nanoelectromechanical (NEM) relays and 3D integration techniques synergistically. Unique features of our architecture include: hybrid CMOS-NEM FPGA look-up tables (LUTs) and con gurable logic blocks (CLBs), NEM-based switch blocks (SBs) and connection blocks (CBs), and face-to-face 3D stacking. This architecture also has a built-in feature named direct link which are dedicated local communication channels using the short vertical wires between the two stacks to further enhance performance. A customized 3D FPGA placement and routing flow and a customized cycle-accurate mixed-level power/thermal simulator have been developed. It is shown that 3D stacking together with NEM devices achieves a 33.11% delay reduction, 29.19% power reduction, and 78.23% footprint reduction over the baseline simultaneously, with negligible temperature penalty. Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2013-06-12T15:40:17Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 1 Li_Chong.pdf: 1843197 bytes, checksum: 8d44afd81340e6d1cdc57e6a79490305 (MD5) Made available in DSpace on 2013-08-22T16:56:48Z (GMT). No. of bitstreams: 2 Chong_Li.pdf: 1843197 bytes, checksum: 8d44afd81340e6d1cdc57e6a79490305 (MD5) license.txt: 4058 bytes, checksum: ee471f406d70d5ad56f56b9fa408a789 (MD5) Restriction data tranferred 2014-07-01T11:36:30-05:00 Original Data Group with Access Administrator Release Date: 2015-08-22 11:57:26 UTC Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system Item marked as restricted to the 'Administrator' Group (id=1) by Seth Robbins (srobbins@illinois.edu) on 2013-08-22T16:57:37Z Item is restricted until 2015-08-22T16:57:26Z Limited Restriction Lifted for Item 45635 on 2015-08-22T10:01:01Z. http://hdl.handle.net/2142/45653 en Copyright 2013 Chong Li Field-Programmable Gate Array (FPGA) Architecture Architecture study of a 3D CMOS-NEM FPGA text Electrical & Computer Eng 1933 Electrical & Computer Engr 1200 University of Illinois at Urbana-Champaign Thesis M.S. MS:Electr & Computer Eng-UIUC 10KS1200MS