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Amrein, Matthew Curtis 2015-07-22T22:18:00Z 2015-07-22T22:18:00Z 2015-05 2015-04-30 Due to the increasing complexity of modern digital designs using NoC (network- on-chip) communication, post-silicon validation has become and arduous task that consumes much of the development time of the product. The process of finding the root cause of bugs found in post-silicon validation has proven to be much more difficult than in pre-silicon because of the lack of the observability of all signals on chip. Trace buffers are a often used structure in post-silicon debug that stores the state of a selected signal into an on-chip buffer, where they can be offloaded for a debugger to observe. However, because of area limitations for debug structures on chip and routing concerns, the signals that are selected to be traced must be a very small subset of all available signals. Traditionally, these trace signals were chosen manually by system designers who determined what signals may be needed for debug once the design reaches post-silicon. However, because modern digital designs have become very complex with many concurrent processes, this method is no longer reliable as designers can no longer fully understand the complexities that are involved within these designs. Recent work has concentrated on automating the selection of low level signals from a gate-level analysis. In this work, we present the first automated system-level, message-based trace selection where the guiding principle is functional coverage of system-level messages. We use a linear programming formulation to find multiple so- lutions that allow tracing of the high-frequency messages and then further analyze these solutions using a message interval heuristic. This method pro- duces traces that allow a debugger to observe when behavior has deviated from the correct path of execution and localize this incorrect behavior for fur- ther analysis. In addition, this method drastically reduces the time needed to select signals, as we automate a currently manual process. Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2015-07-22 without embargo terms The student, Matthew Amrein, accepted the attached license on 2015-04-28 at 15:00. The student, Matthew Amrein, submitted this Thesis for approval on 2015-04-28 at 15:08. This Thesis was approved for publication on 2015-04-30 at 10:00. DSpace SAF Submission Ingestion Package generated from Vireo submission #8163 on 2015-07-22 at 10:34:37 Made available in DSpace on 2015-07-22T22:18:00Z (GMT). No. of bitstreams: 2 AMREIN-THESIS-2015.pdf: 1240247 bytes, checksum: 595beec060a05ab10571af46d4c1298d (MD5) LICENSE.txt: 4211 bytes, checksum: abf5b66524dc773e5a7704c9458f0a52 (MD5) Previous issue date: 2015-04-30 application/pdf http://hdl.handle.net/2142/78532 en Copyright 2015 Matthew Amrein Trace signal System-on-chip (SoC) Network-on-chip (NoC) post-silicon Validation System-level trace signal selection for post-silicon debug using linear programming text text 2015-5 Electrical & Computer Eng Electrical & Computer Engr University of Illinois at Urbana-Champaign Thesis M.S.