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Shanbhag, Naresh R. Hegde, Rajamohana M. 2015-09-25T20:08:02Z 2015-09-25T20:08:02Z 10000-01-01 2002 2002 In this dissertation, we address the problem of designing reliable and low-power VLSI systems for communications and DSP applications. An information theoretic framework to derive the lower bound on energy dissipation of VLSI circuits in presence of deep submicron noise is presented. It is shown that error-control coding can be employed to approach these bounds. We introduce algorithmic noise-tolerance (ANT) which is employing error-control at the algorithmic level to achieve reliable operation in presence of noise. We introduce voltage overscaling where the supply voltage is reduced beyond the limit imposed by the critical path delay to reduce energy dissipation. The resulting degradation in algorithmic performance is restored by employing ANT, thereby achieving energy savings while meeting the algorithmic performance specifications. Made available in DSpace on 2015-09-25T20:08:02Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3044109.pdf: 4569649 bytes, checksum: 0270ac3fe79f634e179ee38829489d12 (MD5) Previous issue date: 2002 Embargo set by: Seth Robbins for item 82044 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 90 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2002. http://hdl.handle.net/2142/80762 (MiAaPQ)AAI3044109 eng Engineering, Electronics and Electrical Reliable and Low -Power Signal Processing via Algorithmic Noise -Tolerance text Electrical and Computer Engineering Electrical and Computer Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.