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oai:www.ideals.illinois.edu:2142/80800 2023-07-11 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Hwu, Wen-Mei W. Merten, Matthew Carl 2015-09-25T20:08:13Z 2015-09-25T20:08:13Z 10000-01-01 2002 2002 This thesis presents a hardware mechanism for generating and deploying run-time optimized code. The system exploits program execution phasing by automatically detecting and optimizing the instruction sequences that comprise the phase, called a hot spot. The hardware mechanism can be viewed as a filtering system that resides after the retirement stage of the processor pipeline, accepts an instruction execution stream as input, and produces instruction profiles and sets of linked, optimized traces as output. The code deployment mechanism uses an extension to the branch prediction mechanism to migrate execution into the new code without modifying the original code. These new components do not add delay to the execution of the program except during short bursts of reoptimization, because they operate in parallel with native execution. This technique provides a strong platform for run-time optimization because the hot execution regions are extracted, optimized, and written to main memory for execution where they will persist across context switches. The framework is designed to preserve precise exception handling while applying optimizations which currently include partial function in-lining (even into shared libraries), code straightening, loop unrolling, peephole optimizations, and instruction rescheduling with renaming, which are all concurrently performed with the running application. Made available in DSpace on 2015-09-25T20:08:13Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3070388.pdf: 9547500 bytes, checksum: 68438f69e91a7c6a3095f7c766b556d2 (MD5) Previous issue date: 2002 Embargo set by: Seth Robbins for item 82082 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 203 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2002. http://hdl.handle.net/2142/80800 (MiAaPQ)AAI3070388 eng Engineering, Electronics and Electrical Run -Time Optimization Architecture text Electrical Engineering Electrical Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.