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Farid N. Najm Buyuksahin, Kavel M. 2015-09-25T20:08:18Z 2015-09-25T20:08:18Z 10000-01-01 2003 2003 Power estimation for register files at the microarchitectural level requires predictions of activity and capacitance of power hungry nodes in the register file. Both of these predictors are developed in this research, thus making it possible to estimate power for multiported, pipelined register files at the microarchitectural level. Made available in DSpace on 2015-09-25T20:08:18Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3086027.pdf: 4743908 bytes, checksum: 9777b40ffa1d279263404114d0d21cac (MD5) Previous issue date: 2003 Embargo set by: Seth Robbins for item 82099 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 111 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2003. http://hdl.handle.net/2142/80817 (MiAaPQ)AAI3086027 eng Engineering, Electronics and Electrical Early Power Estimation for VLSI Circuits text Electrical Engineering Electrical Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.