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oai:www.ideals.illinois.edu:2142/80853 2023-07-11 col_2142_5131 col_2142_8888 com_2142_5130 com_2142_8887 com_2142_234

Hajj, Ibrahim N. Bai, Geng 2015-09-25T20:08:30Z 2015-09-25T20:08:30Z 10000-01-01 2004 2004 We propose a novel approach to the analysis and design of reliable power distribution networks for digital VLSI circuits. The optimized power and ground buses should meet or outperform the noise level specifications while achieving minimum die size. The flow consists of two main steps: analysis and optimization. During the analysis phase, the power and ground buses are broken down into multilevel hierarchical structures. Different algorithms are employed for the analysis at different hierarchies. In all the analyses, input-independent algorithms are used to reduce simulation time and obtain an accurate noise upper bound. Additional techniques (namely, sensitivity analysis, constraint graph optimization, and reduced order modeling techniques) are also employed to improve the accuracy with little overhead in terms of the simulation time. An algorithm is developed to determine the conditions that will cause maximum delay along target critical paths with power/ground bus voltage variation effects. Finally, new techniques for decoupling capacitance placement and power grid area optimization are presented. Made available in DSpace on 2015-09-25T20:08:30Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3130874.pdf: 2911715 bytes, checksum: a2f611cad3e89712845a505bf79ec829 (MD5) Previous issue date: 2004 Embargo set by: Seth Robbins for item 82135 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 118 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2004. http://hdl.handle.net/2142/80853 (MiAaPQ)AAI3130874 eng Engineering, Electronics and Electrical Power Distribution Network Analysis and Optimization in Digital VLSI Circuits text Electrical Engineering Electrical Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.