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Patel, Sanjay J. Wang, Nicholas J. 2015-09-25T20:09:24Z 2015-09-25T20:09:24Z 10000-01-01 2007 2007 Finally, in this work, pains were taken to include as much detail as possible in the processor model and analysis methodology. We conclude with an examination of how making various approximations in the model and analysis methodology affect the experimental results and conclusions of this and other processor reliability studies. Made available in DSpace on 2015-09-25T20:09:24Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3290421.pdf: 3764375 bytes, checksum: 88bdb25d469df77f979bc92e11b86619 (MD5) Previous issue date: 2007 Embargo set by: Seth Robbins for item 82330 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 147 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007. http://hdl.handle.net/2142/81048 (MiAaPQ)AAI3290421 eng Engineering, Electronics and Electrical Cost Effective Soft Error Mitigation in Microprocessors text Electrical and Computer Engineering Electrical and Computer Engineering University of Illinois at Urbana-Champaign Dissertation Ph.D.