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          <dc:description>Thus, our proposed techniques address the challenging problem of energy reduction and reliable operation in a unified manner. They enable us to design deterministic systems even though the process technology has statistical variations. These techniques provide a new computational model that is better suited to the realities of the nanoscale era. Such computational models may be key to extending Moore's law into the deep nanoscale silicon and post-silicon era.</dc:description>
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  Previous issue date: 2008</dc:description>
          <dc:contributor>Shanbhag, Naresh R.</dc:contributor>
          <dc:creator>Varatkar, Girish Vishnu</dc:creator>
          <dc:date>2015-09-25T20:09:31Z</dc:date>
          <dc:date>2015-09-25T20:09:31Z</dc:date>
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          <dc:date>2008</dc:date>
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Lift date: Forever
Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs</dc:description>
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          <dc:identifier>(MiAaPQ)AAI3314923</dc:identifier>
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          <dc:subject>Engineering, Electronics and Electrical</dc:subject>
          <dc:title>Energy-Efficient and Error-Tolerant Digital Design</dc:title>
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            <grantor>University of Illinois at Urbana-Champaign</grantor>
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