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        <identifier>oai:www.ideals.illinois.edu:2142/81606</identifier>
        <datestamp>2023-07-11</datestamp>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Torrellas, Josep</dc:contributor>
          <dc:creator>Huang, Michael Cliff</dc:creator>
          <dc:date>2015-09-25T20:19:28Z</dc:date>
          <dc:date>2015-09-25T20:19:28Z</dc:date>
          <dc:date>10000-01-01</dc:date>
          <dc:date>2002</dc:date>
          <dc:date>2002</dc:date>
          <dc:description>The second part of the thesis discusses how to further improve the algorithm for energy efficiency. We observe that applications change their demands on the hardware as they execute. This suggests that certain hardware adaptations can be made to save energy at little performance cost. In the context of a general purpose system with multiple LPTs, we address the twin problems of  when to adapt, and what LPT to use to adapt. We demonstrate that rather than adapting the processor at time intervals, it is better to do it at the grain of subroutines: the reaction of a subroutine to system adaptation is usually highly predictable, and the best adaptation for a subroutine can be easily remembered and reused later. Using this insight, we design architectural support for an adaptive processor to decide what specific LPTs to activate and when to activate them. Targeting different environments, we propose a framework of different schemes to exploit an adaptive processor, where these decisions are made off- or on-line. Overall, the schemes perform better than an approach based on fixed-time intervals similar to the original DEETM: in a system with three LPTs, energy savings increase by 40--63% with less performance degradation.</dc:description>
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  Previous issue date: 2002</dc:description>
          <dc:description>Embargo set by: Seth Robbins for item 82887
Lift date: Forever
Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs</dc:description>
          <dc:description>Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs</dc:description>
          <dc:description>U of I Only</dc:description>
          <dc:description>99 p.</dc:description>
          <dc:description>Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2002.</dc:description>
          <dc:identifier>http://hdl.handle.net/2142/81606</dc:identifier>
          <dc:identifier>(MiAaPQ)AAI3070329</dc:identifier>
          <dc:language>eng</dc:language>
          <dc:subject>Computer Science</dc:subject>
          <dc:title>Managing Processor Adaptation for Energy Reduction and Temperature Control</dc:title>
          <dc:type>text</dc:type>
          <degree>
            <department>Computer Science</department>
            <discipline>Computer Science</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Dissertation</level>
            <name>Ph.D.</name>
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