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oai:www.ideals.illinois.edu:2142/81836 2023-07-11 col_2142_5131 col_2142_10761 com_2142_5130 com_2142_10755 com_2142_234

Torrellas, Josep Teodorescu, Mircea-Radu 2015-09-25T20:20:38Z 2015-09-25T20:20:38Z 10000-01-01 2008 2008 Within-die process variation causes individual cores in a Chip Multiprocessor (CMP) to differ substantially in both static power consumed and maximum frequency supported. In this environment, ignoring variation effects when scheduling applications or when managing power with Dynamic Voltage and Frequency Scaling (DVFS) is suboptimal. This thesis presents a set of variation-aware algorithms for application scheduling and power management. One such power management algorithm, uses linear programming to find the best voltage and frequency levels for each of the cores in the CMP---maximizing throughput at a given power budget. Made available in DSpace on 2015-09-25T20:20:38Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3337938.pdf: 4891527 bytes, checksum: 703a4743d73cec0d853b80bc7e548381 (MD5) Previous issue date: 2008 Embargo set by: Seth Robbins for item 83117 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs U of I Only 91 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2008. http://hdl.handle.net/2142/81836 (MiAaPQ)AAI3337938 eng Computer Science Multilayer Techniques to Address Parameter Variation text Computer Science Computer Science University of Illinois at Urbana-Champaign Dissertation Ph.D.