2026-09-19T22:24:53Z https://www.ideals.illinois.edu/oai-pmh

oai:www.ideals.illinois.edu:2142/98236 2023-07-11 col_2142_8888 col_2142_5131 com_2142_8887 com_2142_234 com_2142_5130

Wong, Martin D. F. Lai, Tin-Yin 2017-09-29T16:39:10Z 2017-09-29T16:39:10Z 2019-09-30T09:15:29Z 2017-06-19 2017-08 Ever-increasing circuit design complexity is driving the need for fast and accurate macro-modeling algorithms to accelerate hierarchical timing. We introduce LibAbs, an effective macro-modeling algorithm that efficiently supports high accuracy, high compression rate, and multi-threading. LibAbs applies tree-based graph reduction techniques to reduce the model size with accuracy values comparable to those of the flat model under a multi-threaded environment. LibAbs outperforms existing tools including the top winners from the TAU 2016 macro-modeling contest in terms of model size, accuracy, and runtime on industry benchmarks. The in-context usage of our abstracted model has also demonstrated promising performance for timing-driven optimizations in large hierarchical designs. Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2019-08-01 The student, Tin-Yin Lai, accepted the attached license on 2017-06-16 at 00:00. The student, Tin-Yin Lai, submitted this Thesis for approval on 2017-06-16 at 16:06. This Thesis was approved for publication on 2017-06-19 at 16:34. DSpace SAF Submission Ingestion Package generated from Vireo submission #11229 on 2017-09-29 at 11:13:45 Made available in DSpace on 2017-09-29T16:39:10Z (GMT). No. of bitstreams: 2 LAI-THESIS-2017.pdf: 628015 bytes, checksum: 52cfc9119ab58a165770100b7c581df2 (MD5) LICENSE.txt: 4208 bytes, checksum: 9d149d505908b6c30eda9cc01461ba8a (MD5) Previous issue date: 2017-06-19 Embargo set by: Colleen Fallaw for item 103383 Lift date: 2019-09-29T16:39:52Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system Embargo set by: Colleen Fallaw for item 103383 Lift date: 2019-09-29T17:52:45Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system Limited Restriction Lifted for Item 103383 on 2019-09-30T09:15:29Z. application/pdf http://hdl.handle.net/2142/98236 en Copyright 2017 Tin-Yin Lai Timing macro-modeling Algorithm Timing analysis An efficient and accurate timing macro-modeling algorithm for large hierarchical designs text text Electrical & Computer Eng Electrical & Computer Engr University of Illinois at Urbana-Champaign Thesis M.S.