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        <datestamp>2023-07-11</datestamp>
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        <thesis xmlns="http://www.ndltd.org/standards/metadata/etdms/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.ndltd.org/standards/metadata/etdms/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdms11.xsd http://purl.org/dc/elements/1.1/ http://www.ndltd.org/standards/metadata/etdms/1.1/etdmsdc.xsd">
          <dc:contributor>Pilawa-Podgurski, Robert</dc:contributor>
          <dc:creator>Zhang, Yizhe</dc:creator>
          <dc:date>2017-09-29T17:57:13Z</dc:date>
          <dc:date>2017-09-29T17:57:13Z</dc:date>
          <dc:date>2017-07-21</dc:date>
          <dc:date>2017-08</dc:date>
          <dc:description>Series-stacked server power delivery architectures have been proposed recently that can achieve much higher energy efficiency than conventional power delivery architectures. When servers are connected in series, differential power processing (DPP) converters can be used to regulate the server voltages when the servers are consuming different amounts of current. Server-to-bus DPP architecture has unique advantages among several other DPP architectures such as being able to achieve the minimum power processed in the DPP converters, and having a higher reliability than other DPP architectures. This work presents the development of a server-to-bus DPP architecture for server power delivery. The hardware prototype is built with four 4-to-1 isolated DPP converters with GaN switches. Four 12V 120W Dell servers are used in the bench test to validate the operation of server-to-bus DPP. 98.99% efficiency is achieved while the servers are running a real-life data center computational load.</dc:description>
          <dc:description>Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2017-09-29 without embargo terms</dc:description>
          <dc:description>The student, Yizhe Zhang, accepted the attached license on 2017-07-21 at 12:47.</dc:description>
          <dc:description>The student, Yizhe Zhang, submitted this Thesis for approval on 2017-07-21 at 13:10.</dc:description>
          <dc:description>This Thesis was approved for publication on 2017-07-21 at 13:21.</dc:description>
          <dc:description>DSpace SAF Submission Ingestion Package generated from Vireo submission #11578 on 2017-09-29 at 11:32:29</dc:description>
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  Previous issue date: 2017-07-21</dc:description>
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          <dc:identifier>http://hdl.handle.net/2142/98440</dc:identifier>
          <dc:language>en</dc:language>
          <dc:rights>Copyright 2017 Yizhe Zhang</dc:rights>
          <dc:subject>Power electronics</dc:subject>
          <dc:subject>Data center</dc:subject>
          <dc:subject>Power delivery architecture</dc:subject>
          <dc:subject>Series-stacking</dc:subject>
          <dc:subject>Differential power processing (DPP)</dc:subject>
          <dc:subject>Direct current to direct current (DC-DC) conversion</dc:subject>
          <dc:title>A series-stacked architecture with isolated server-to-bus converters for high-efficiency data center power delivery</dc:title>
          <dc:type>text</dc:type>
          <dc:type>text</dc:type>
          <degree>
            <department>Electrical &amp; Computer Eng</department>
            <discipline>Electrical &amp; Computer Engr</discipline>
            <grantor>University of Illinois at Urbana-Champaign</grantor>
            <level>Thesis</level>
            <name>M.S.</name>
          </degree>
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