The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
Chang, Pohua P.; Lavery, Daniel M.; Hwu, Wen-Mei W.
Permalink
https://hdl.handle.net/2142/74514
Description
Title The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors Author(s) Chang, Pohua P. Lavery, Daniel M. Hwu, Wen-Mei W. Issue Date 1991-05 Keyword(s) Code scheduling Control-intensive programs Optimizing compiler Register allocation Superpipelined processors Superscalar processors Publisher Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign Series/Report Name or Number Coordinated Science Laboratory Report no. UILU-ENG-91-2228, CRHC-91-18 Type of Resource text Language English Permalink http://hdl.handle.net/2142/74514 Sponsor(s)/Grant Number(s) National Science Foundation / MIP-8809478 NCR AMD 29K Advanced Processor Development Division National Aeronautics and Space Administration / NASA NAG 1-613 U.S. Department of Energy / DOE DE-FGO2-85ER25001 IBM Corporation
Owning Collections
