Recursive Gate-Arrays

Chiang, C.; Maddila, S.; Sarrafzadeh, M.

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https://hdl.handle.net/2142/74235 Copy

Description

Title

Recursive Gate-Arrays

Author(s)

• Chiang, C.
• Maddila, S.
• Sarrafzadeh, M.

Issue Date

1988-12

Keyword(s)

• Gate-array
• VLSI layout placement
• Knock-knee model

Publisher

Applied Computation Theory, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-88-2262, ACT-104

Type of Resource

text

Language

English

Permalink

http://hdl.handle.net/2142/74235

Sponsor(s)/Grant Number(s)

• Joint Services Electronics Program / N00014-84-C-0149
• National Science Foundation / MIP-8709074 and ECS-8410902

Owning Collections