University of Illinois Urbana-Champaign

Hierarchical Approaches to VLSI Circuit Layout

Sarrafzadeh, Majid

Content Files
86-2240.pdf

Permalink

https://hdl.handle.net/2142/75712

Description

Title
Hierarchical Approaches to VLSI Circuit Layout
Author(s)
Sarrafzadeh, Majid
Issue Date
1986-12
Keyword(s)
  • Top-down approach
  • Bottom-up approach
  • Channel Routing Problem
  • 45° grid
  • LLSI circuit layout
Date of Ingest
  • 2015-04-22T16:11:27Z
  • 2017-07-14T23:59:32Z
Publisher
Applied Computation Theory, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. UILU-ENG-86-2240, ACT-72
Type of Resource
text
Genre of Resource
Report (Grant or Annual)
Language
English
Permalink
http://hdl.handle.net/2142/75712
Sponsor(s)/Grant Number(s)
Semiconductor Research Corporation / SRC-RSCH-84-06-049-6

Owning Collections

Report - Coordinated Science Laboratory PRIMARY