Periodic Application of Concurrent Error Detection in Processor Array Architectures
Chen, Paul Peichuan
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https://hdl.handle.net/2142/88459
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Title Periodic Application of Concurrent Error Detection in Processor Array Architectures Author(s) Chen, Paul Peichuan Issue Date 1993-04 Keyword(s) Modularity High parallelism VLSI/WSI Real-time signal processing Date of Ingest 2015-12-10T23:21:15Z 2017-07-15T00:01:08Z Publisher Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign Series/Report Name or Number Coordinated Science Laboratory Report no. UILU-ENG-93-2214, CRHC-93-08 Type of Resource text Genre of Resource Report (Grant or Annual) Language en Permalink http://hdl.handle.net/2142/88459 Sponsor(s)/Grant Number(s) Office of Naval Research / N00014-89-K-0070 NASA
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