Evaluation of a Design for Concurrent Error Detection and Testability in Large Storage/Logic Arrays

Maciukenas, Thomas Brian

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https://hdl.handle.net/2142/88561 Copy

Description

Title

Evaluation of a Design for Concurrent Error Detection and Testability in Large Storage/Logic Arrays

Author(s)

Maciukenas, Thomas Brian

Issue Date

1994-02

Keyword(s)

• Storage/logic arrays
• Testing
• Error detection
• Self-test
• Checker

Publisher

Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-94-2209, CRHC-94-08

Type of Resource

text

Language

en

Permalink

http://hdl.handle.net/2142/88561

Sponsor(s)/Grant Number(s)

Semiconductor Research Corporation / 93-DP-109

Owning Collections