Design, Analysis and Reconfiguration of Defect-Tolerant VLSI and Parallel Processor Arrays
Shi, Weiping
Permalink
https://hdl.handle.net/2142/88482
Description
Title Design, Analysis and Reconfiguration of Defect-Tolerant VLSI and Parallel Processor Arrays Author(s) Shi, Weiping Issue Date 1994-09 Keyword(s) Reconfiguration Analysis Design Defect-tolerant VLSI parallel processing arrays Date of Ingest 2015-12-10T23:21:22Z 2017-07-15T00:12:52Z Publisher Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign Series/Report Name or Number Coordinated Science Laboratory Report no. UILU-ENG-94-2236, CRHC-94-21 Type of Resource text Genre of Resource Report (Grant or Annual) Language en Permalink http://hdl.handle.net/2142/88482 Sponsor(s)/Grant Number(s) Semiconductor Research Corporation
Owning Collections
