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https://hdl.handle.net/2142/88578
Description
Title
Logic Design Verification Using Static Analysis
Author(s)
Hanes, Larry Lewis
Issue Date
1983-05
Keyword(s)
Logic verification
Static analysis
Hierarchical design
SCALD
LMA
Publisher
Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. CSG-15
Type of Resource
text
Language
en
Permalink
http://hdl.handle.net/2142/88578
Sponsor(s)/Grant Number(s)
Naval Electronics Systems Command VHSIC Program / N00039-80-C-0556
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