Design and implementation of a 100 W series-parallel POL converter

Saathoff, Erik

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https://hdl.handle.net/2142/100031 Copy

Description

Title

Design and implementation of a 100 W series-parallel POL converter

Author(s)

Saathoff, Erik

Contributor(s)

• Banerjee, Arijit
• Pilawa-Podgirski, Robert

Issue Date

2018-05

Keyword(s)

• series-parallel POL converter
• point-of-load converter
• fully integrated power converter
• zero-current switching (ZCS)

Abstract

Electrical demand by computer systems, especially that by servers and mainframes, has grown exponentially in modern times when energy conservation is becoming a serious issue. In the future, there will be a greater need for power electronic systems that cannot only supply higher power demand, but also do so with greater efficiency and in smaller form factors. This work tackles the case of a point-of-load (POL) converter by presenting the design and implementation of a 100 W, 12 VDC to 2 VDC converter. To improve the efficiency and size of the converter compared to industry implementations, an innovative topology is combined with older and more reliable switching devices: a 6-1 series-parallel resonant converter using high-performance silicon MOSFETs operating at 90 kHz. The efficiency is expected to exceed 97% at 50 W with a power density as high as 40 W/cm3. The resonant nature of the converter removes the ability of the converter to regulate its output voltage, but this case is coupled to that of a CPU with a fully integrated voltage regulator (FIVR) which can perform the final power conversion based on current voltage needs and at a low step-down ratio. Resonant operation also allows for a decrease in the size of magnetic components which allows for a much smaller volume and less weight. Additionally, the resonance results in zero-current switching (ZCS) which further improves the efficiency of the converter.

Type of Resource

text

Language

en

Permalink

http://hdl.handle.net/2142/100031

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