University of Illinois Urbana-Champaign

Enhancing Defect Coverage of VLSI Chips by Using Cost Effective Delay Fault Tests

Sharma, Manish

Content Files
03-2220.pdf

Permalink

https://hdl.handle.net/2142/103854

Description

Title
Enhancing Defect Coverage of VLSI Chips by Using Cost Effective Delay Fault Tests
Author(s)
Sharma, Manish
Issue Date
2003-10
Keyword(s)
  • VLSI testing
  • Delay fault testing
  • Path delay test generation
  • Design for test
Date of Ingest
2019-05-17T14:36:51Z
Publisher
Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. UILU-ENG-03-2220, CRHC-03-11
Type of Resource
text
Language
en
Permalink
http://hdl.handle.net/2142/103854
Sponsor(s)/Grant Number(s)
  • Semiconductor Research Corp. / SRC 99-TJ-717
  • DARPA
  • Hewlett Packard

Owning Collections

Report - Coordinated Science Laboratory PRIMARY