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University of Illinois Urbana-Champaign
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A study of worst-case integrated circuit optimization using iEDISON3.0
Bieker, John Joseph
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https://hdl.handle.net/2142/108870
Description
Title
A study of worst-case integrated circuit optimization using iEDISON3.0
Author(s)
Bieker, John Joseph
Issue Date
1994
Director of Research (if dissertation) or Advisor (if thesis)
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