Proactive voltage droop mitigation techniques for high performance processors
Zhang, Jimmy Jieming
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https://hdl.handle.net/2142/117726
Description
Title
Proactive voltage droop mitigation techniques for high performance processors
Author(s)
Zhang, Jimmy Jieming
Issue Date
2022-10-20
Director of Research (if dissertation) or Advisor (if thesis)
Kumar, Rakesh
Hanumolu, Pavan K
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Proactive Voltage Noise Mitigation
Voltage Emergency
Prediction
Language
eng
Abstract
As processors increase in performance and power consumption, the demand on the power deliver subsystem to provide a low noise voltage line becomes increasingly difficult to meet. If the voltage noise causes the voltage to droop below the required operating voltage, errors may occur, causing a voltage emergency. Reactive techniques for handling voltage emergencies are limited to only low frequency droops or are too complex to implement over an entire processor. Proactive voltage emergency techniques aim to solve these issues by accurately predicting and mitigating voltage emergency droops before they occur. In this work we study various forms of voltage emergency prediction. We build a simulation framework to test and analyze voltage emergency predictors. We evaluate signature-based prediction, and identify which workload types work best with signature-based prediction. We analyze application specific voltage emergency predictors and show that constraining predictors to an application can increase performance and reduce complexity. Finally, we analyze current based prediction, which we develop into a novel general-purpose predictor that outperforms previously proposed predictors.
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