Latency insertion method for fast high-speed link and IC simulation

Zhou, Yi

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https://hdl.handle.net/2142/121353 Copy

Description

Title

Latency insertion method for fast high-speed link and IC simulation

Author(s)

Zhou, Yi

Issue Date

2023-07-20

Director of Research (if dissertation) or Advisor (if thesis)

Schutt-Ainé, José E.

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

M.S.

Degree Level

Thesis

Keyword(s)

• Latency Insertion Method
• High-Speed Link
• Eye Diagram
• FinFET
• BSIM-CMG

Abstract

This thesis focuses on the Latency Insertion Method (LIM) for high-speed link and IC simulation. LIM is a transient simulation algorithm for circuits. Compared to Modified Nodal Analysis (MNA) methods such as SPICE, LIM exhibits linear computational complexity, which makes it faster than almost all the commercial software, especially for large-scale circuits. For high-speed link simulation, the LIM method for eye diagram simulation are first presented for both situations without and with crosstalk. The proposed method is compared to commercial software to prove that LIM can provide accurate and fast eye diagram simulations. For IC simulation, this thesis focuses on the latest technology that is 3-D FinFET. We presented LIM algorithms for both DC and transient FinFET simulation. By implementing the BSIM-CMG compact model, accurate and fast simulations can be achieved.

Graduation Semester

2023-08

Type of Resource

Thesis

Handle URL

https://hdl.handle.net/2142/121353

Copyright and License Information

Copyright 2023 Yi Zhou

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