Non-volatile reconfigurable transistors enabled by ferroelectrics for logic-in-memory applications

Zhao, Zijing

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https://hdl.handle.net/2142/121450 Copy

Description

Title

Non-volatile reconfigurable transistors enabled by ferroelectrics for logic-in-memory applications

Author(s)

Zhao, Zijing

Issue Date

2023-07-07

Director of Research (if dissertation) or Advisor (if thesis)

Zhu, Wenjuan

Doctoral Committee Chair(s)

Zhu, Wenjuan

Committee Member(s)

• Chen, Deming
• Lyding, Joseph
• Rakheja, Shaloo

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

Ph.D.

Degree Level

Dissertation

Keyword(s)

Ferroelectric, 2D materials, reconfigurable transistor

Abstract

Driven by data-intensive applications from the machine learning and artificial intelligence domains, energy efficiency has become a crucial concern for computing systems. Logic-in-memory and data-stream processing architectures are being proposed to address the limitations of bandwidth and high power consumption associated with transferring data between processing and storage. In order to bring computing logic closer to memory, innovation in transistor technology is necessary. The high flexibility of two-dimensional (2D) materials allows for the integration of various logic and memory heterostructures through layer-by-layer assembly, without having to worry about compatibility issues during deposition. In the meantime, ferroelectric materials can also provide non-volatile doping to the atomic thin body of 2D materials, enabling the 2D transistor to dynamically change its function during runtime. The heterostructures based on 2D and ferroelectric materials provide a strong foundation for developing logic-in-memory devices. In this thesis, we have created various new electronic and photonic devices based on these materials, including ferroelectric random access memory, non-volatile reconfigurable logic devices, tunable photodetectors, and content-addressable memories. These devices will have broad applications in data centers, mobile electronics, computing systems, and sensing networks. In this thesis, 2D Schottky barrier transistors based on few-layer MoTe2 are first presented. The strong electrostatic gating at the contact allows for ambipolar conduction, which is exhibited by the presence of both electron and hole branches in the transfer curve. XOR logic in a single transistor is then demonstrated based on the double-gate Schottky barrier transistor with ambipolar conductions. In the following chapter, CuInP2S6, a 2D ferroelectric material, as well as its heterostructures, are investigated. Through systematic measurement of the polarization-voltage (P-V) loop under various temperatures and frequencies, the imprint field is found to shift the P-V loop at low temperatures and high frequencies, which can be attributed to the fixed dipoles induced by defects. The switching dynamics of the CuInP2S6 capacitor are analyzed with the nucleation-limited switching (NLS) model, where the switching time at the infinite field limit is extracted. Double-gate ferroelectric transistors based on CuInP2S6/MoTe2 heterostructures are demonstrated. Sizable memory windows are observed in these devices, which can be explained by the electrostatic doping induced by the ferroelectric polarization. After demonstrations of individual logic and memory devices, reconfigurable transistors are proposed as a device platform for logic-in-memory architecture where logic and memory functionalities are fused in the same transistor. Control-free volatile reconfigurable transistors are first demonstrated. By introducing asymmetric Schottky barriers, the transistor shows different polarities under different current flow directions. Furthermore, non-volatile reconfigurable transistors based on ferroelectric materials are demonstrated, where the local doping at the source and drain contacts are controlled by ferroelectric polarization. When the drain-source contacts are programmed symmetrically, (p−p or n−n doping), the contacts act as reservoirs of carriers of the same polarity and suppress the injection of carriers of the opposite polarity. As a result, the transistor can switch between unipolar n-type and p-type polarity under different polarization directions. The switching dynamics are also investigated in the one-side doped transistor and confirm the doping as induced by ferroelectric polarization. Finally, the non-volatile reconfigurable transistor is also found to possess reconfigurable photoresponse. Non-volatile reconfigurable transistor brings new ideas for logic and memory implementations in the logic-in-memory architecture. Here, logic gates based on the non-volatile reconfigurable transistors are presented. First demonstrated is an inverter with functional logic output. Then, a circuit with a reconfigurable NAND/NOR function is demonstrated by switching the polarity of all transistors, where the transistors can serve as either a pull-down or pull-up network. These designs represent a transistor-level reconfiguration scheme for field-programmable hardware. Content addressable memory (CAM) based on non-volatile reconfigurable transistors features a compact design with 1 transistor per cell, showing high area and power efficiency. The reading and writing of a 2-bit CAM array are demonstrated for both NAND and NOR organizations. The efficient reconfigurable logic blocks and CAM designs highlight the potential of non-volatile reconfigurable transistors for logic-in-memory applications.

Graduation Semester

2023-08

Type of Resource

Thesis

Copyright and License Information

Copyright 2023 Zijing Zhao

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