A Multiprocessor Cache Performance Metric

Marcovitz, David Michael

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https://hdl.handle.net/2142/126869 Copy

Description

Title

A Multiprocessor Cache Performance Metric

Author(s)

Marcovitz, David Michael

Issue Date

1988-08

Keyword(s)

algorithms, performance-evaluation, software

Date of Ingest

2025-03-25T14:48:24-05:00

Abstract

This paper proposes a cache performance metric for multiprocessor computers. Real parallel memory traces drive a simulator that produces statistics to support this new metric. The performance of single processor computers generally is related directly to cache miss ratio. Thus, cache miss ratio is a good performance metric for uniprocessors. This is not true of multiprocessors. This paper shows that miss ration is a poor performance metric for multiprocessors. For multiprocessors, the service times of many cache misses can be overlapped so that some misses cause little or no performance penalty. Misses that occur closer together can be overlapped more than misses that occur further apart. This paper proposes that the standard deviation of the time between misses, normalized with miss ration, is a good measure of how much miss service times can be overlapped, and thus is a good performance metric.

Publisher

Center for Super Computing Research and Development, University of Illinois Urbana-Champaign

Series/Report Name or Number

CSRD-813, UILU-ENG-88-8011

Type of Resource

text

Genre of Resource

• technical report
• dissertation/thesis

Language

eng

Sponsor(s)/Grant Number(s)

National Science Foundation U.S. NSF-MIO-84 10110, US DOE-DE-FG02-85ER25001

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