High-swing PAM4 electrical transmitter with clock data recovery based timing error correction
Shi, Ji
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https://hdl.handle.net/2142/129780
Description
Title
High-swing PAM4 electrical transmitter with clock data recovery based timing error correction
Author(s)
Shi, Ji
Issue Date
2025-05-07
Director of Research (if dissertation) or Advisor (if thesis)
Hanumolu, Pavan Kumar
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
High Speed Wireline IC
Clock Correction
SERDES
Abstract
This thesis presents a high-swing PAM4 transmitter with an integrated CDR based timing calibration architecture implemented in a 16nm CMOS process. The proposed transmitter achieves a differential output swing of 2VDD using standard core devices. A CDR-based timing calibration circuit is introduced that detects timing errors at the transmitter output, allowing correction of all timing non-idealities throughout the signal path. Simulation results demon strate improved eye quality after calibration for PAM4 signaling.
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