University of Illinois Urbana-Champaign

Demystifying CXL type-2 devices—with composable CXL-SSDS as a case study

Zhou, Yang

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https://hdl.handle.net/2142/132701

Description

Title
Demystifying CXL type-2 devices—with composable CXL-SSDS as a case study
Author(s)
Zhou, Yang
Issue Date
2025-12-09
Director of Research (if dissertation) or Advisor (if thesis)
Kim, Nam Sung
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
  • Compute Express Link
  • Heterogeneous Computing
Abstract
CXL is a PCIe-based interconnect that defines three protocols for three classes of devices, each with distinct capabilities. Commercial adoption has arrived first for CXL Type-3 devices, with CXL Type-2 devices emerging afterward—making it timely to clarify CXL Type-2 device’s capabilities and applications. We first examine three core CXL Type-2 device features: cache-coherent device accelerator to host memory, device accelerator to device memory, and host CPU to device memory accesses. We then introduce CXL-AnySSD, a composable, memory-semantic CXL-SSD that exploits hardware-managed device-to-host transfers in CXL Type-2 devices. By loosely coupling DRAM with commodity SSDs, CXL-AnySSD decouples capacity from performance, supports heterogeneous SSD choices, and removes OS-managed swap overheads. We implement a CXL-AnySSD prototype on a real CXL Type-2 device and show CXL-AnySSD improves end-to-end throughput by 2.3–6.2× over OS-managed SSD swap on a vector-database workload.
Graduation Semester
2025-12
Type of Resource
Thesis
Handle URL
https://hdl.handle.net/2142/132701
Copyright and License Information
Copyright 2025 Yang Zhou

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