In-situ impedance characterization for assessing SiC MOSFETs reliability

Karakaya, Furkan

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https://hdl.handle.net/2142/132743 Copy

Description

Title

In-situ impedance characterization for assessing SiC MOSFETs reliability

Author(s)

Karakaya, Furkan

Issue Date

2025-09-30

Director of Research (if dissertation) or Advisor (if thesis)

• Banerjee, Arijit
• Donnal, John S.

Doctoral Committee Chair(s)

Banerjee, Arijit

Committee Member(s)

• Rakheja, Shaloo
• Stillwell, Andrew R.
• Sung, Woongje

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois Urbana-Champaign

Degree Name

Ph.D.

Degree Level

Dissertation

Keyword(s)

• Power electronics
• reliability
• degradation
• diagnostics
• silicon carbide
• SiC
• MOSFET
• condition monitoring
• aging evaluation
• gate oxide health
• bond wire health
• device health
• in-situ
• impedance characterization
• current injection
• analog circuits
• high frequency
• radio frequency
• online estimation
• on state resistance
• package inductance
• on state impedance
• channel impedance
• mosfet channel

Abstract

This dissertation presents an in-situ and online impedance characterization circuit for condition monitoring (CM) of Silicon Carbide (SiC) MOSFETs. The core concept involves injecting a pre-adjusted high-frequency current (≥ 2 MHz) into the device and isolating the resulting voltage component induced by this injection. By applying algebraic operations, the drain-to-source impedance is characterized and separated into its sub-components: on-state resistance and package inductance. Accelerated aging experiments confirm that on-state resistance correlates with gate-oxide degradation, while bond-wire lift-off leads to a measurable increase in package inductance. The circuit is thus capable of simultaneously tracking both degradation modes. Its performance is validated through extensive experimental setups including impedance analyzers, network analysis, oscilloscope waveforms, and x-ray imaging. In addition, the thesis proposes a scalable and galvanically isolated solution for monitoring multiple SiC MOSFETs operating in complementary configurations, enabling integration into practical converter topologies. Gate-oxide degradation is evaluated using time-dependent dielectric breakdown testing, where gate-leakage current and on-state resistance are monitored. Results indicate that gate-leakage current remains in the sub-microampere range until the device fails abruptly, whereas on-state resistance exhibits a gradual increase due to growing trap concentration in the oxide. This makes on-state resistance a more practical precursor for early detection of gate-oxide degradation and preemptive device replacement. Bond-wires represent another critical point of failure in SiC MOSFETs, largely due to the mechanical mismatch between aluminum wires and the SiC substrate. Thermal cycling over a device’s lifetime can cause fatigue at the solder joint, eventually leading to bond-wire lift-off. Even with multiple parallel wires, failure of one increases stress on the remaining wires and accelerates degradation. Package inductance, primarily shaped by bond-wire layout, is a unique and temperature-independent indicator of bond-wire integrity. A lift-off changes the current distribution and results in a step increase in inductance. Although this principle was known, no in-situ method previously existed. This work introduces the first in-situ and online solution capable of measuring package inductance with high sensitivity—detecting changes as small as 10 pH with 99 % confidence—as well as milliohm-level changes in on-state resistance. Finally, the thesis presents a scalable, galvanically isolated monitoring solution tailored for complementary switch configurations commonly found in half-bridge, T-type, and neutral-point-clamp topologies. Instead of duplicating CM circuitry for each device, a single CM unit connects to complementary switches through a custom multi-port transformer. The proposed AC current-injection technique leverages the transformer windings for both current injection and voltage sensing. Because the transformer coils can float at arbitrary voltage levels, this system can monitor devices referenced to non-zero potentials. Electromagnetic design of a three-port transformer and a novel clamp-bias circuit are discussed in detail. The complete solution is experimentally validated on a SiC half-bridge operating at 800 V with 16 APP ripple current, successfully detecting individual bond-wire lift-off events on both high- and low-side devices.

Graduation Semester

2025-12

Type of Resource

Thesis

Handle URL

https://hdl.handle.net/2142/132743

Copyright and License Information

Copyright 2025 Furkan Karakaya

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