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Efficient ethernet switch models for large-scale network simulation
Jin, Dong
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https://hdl.handle.net/2142/16183
Description
- Title
- Efficient ethernet switch models for large-scale network simulation
- Author(s)
- Jin, Dong
- Issue Date
- 2010-05-19T18:40:01Z
- Director of Research (if dissertation) or Advisor (if thesis)
- Nicol, David M.
- Department of Study
- Electrical & Computer Eng
- Discipline
- Electrical & Computer Engr
- Degree Granting Institution
- University of Illinois at Urbana-Champaign
- Degree Name
- M.S.
- Degree Level
- Thesis
- Date of Ingest
- 2010-05-19T18:40:01Z
- Keyword(s)
- switch modeling
- simulation
- measurement
- performance
- Abstract
- Ethernet is the most widely implemented low-level networking technology used today, with Gigabit Ethernet seen as the emerging standard implementation. The backbones of many large scale networks (e.g., data centers, metro-area deployments) are increasingly made up of Gigabit Ethernet as the underlying technology, and Ethernet is seeing increasing use in dynamic and failure-prone settings (e.g., wireless backhaul, developing regions) with high rates of churn. Correspondingly, when using simulation to study such networks and applications that run on them, the switching makes up a significant fraction of the model, and can make up a significant amount of the simulation activity. This work describes a unique testbed that gathers highly accurate measurements of loss and latency through a switch, reports on experiments that reveal the behavior of three commercial switches, and then proposes simulation models that explain the observed data. The models vary in their computational complexity and in their accuracy with respect to frame loss patterns, and latency through the switch. In particular, the simplest model predicts a frame’s loss and latency immediately at the time of its arrival, which keeps the computational cost close to one event per frame per switch, provides excellent temporal separation between switches (useful for parallel simulation), and provides excellent accuracy for loss and adequate accuracy for latency.
- Graduation Semester
- 2010-5
- Permalink
- http://hdl.handle.net/2142/16183
- Copyright and License Information
- Copyright 2010 Dong Jin
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Dissertations and Theses - Electrical and Computer Engineering
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