University of Illinois Urbana-Champaign

Goldmine: An integration of data mining and static analysis for automatic generation of hardware assertions

Sheridan, David

Content Files
Sheridan_David.pdf

Permalink

https://hdl.handle.net/2142/24159

Description

Title
Goldmine: An integration of data mining and static analysis for automatic generation of hardware assertions
Author(s)
Sheridan, David
Issue Date
2011-05-25T15:04:06Z
Director of Research (if dissertation) or Advisor (if thesis)
Vasudevan, Shobha
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Date of Ingest
2011-05-25T15:04:06Z
Keyword(s)
  • GoldMine
  • assertion
  • generation
  • automatic
  • integration
  • static analysis
  • data mining
  • dynamic analysis
  • decision tree
  • association mining
  • coverage guided mining
  • OpenSparc
  • invariant
  • simulation
  • Register Transfer Level (RTL)
  • Hardware
  • design
Abstract
"We present GoldMine, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. The RTL design is first simulated to generate data about the design’s dynamic behavior. The generated data is then mined for ""candidate assertions"" that are likely to be invariants. We present both a decision tree supervised learning algorithm as well as a coverage guided mining algorithm for generating high-quality assertions. These candidate assertions are then passed through a formal verification engine to filter out the spurious candidates. The assertions that are attested as true by the formal engine are system invariants. These are then evaluated by a process of designer ranking that is provided as feedback to the data mining engine. We present results of using GoldMine for assertion generation of the RTL of Sun’s OpenSparc T2 many-threaded processor. Our results show that GoldMine can generate complex, high-coverage assertions in RTL, thereby minimizing human effort in this process."
Graduation Semester
2011-05
Permalink
http://hdl.handle.net/2142/24159
Copyright and License Information
Copyright 2011 David Sheridan

Owning Collections

Graduate Dissertations and Theses at Illinois PRIMARY
Graduate Theses and Dissertations at Illinois
Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering