System-level optimization of the DC-DC voltage regulator and core for sub/near-threshold voltage operation
Zhang, Sai
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https://hdl.handle.net/2142/42360
Description
Title
System-level optimization of the DC-DC voltage regulator and core for sub/near-threshold voltage operation
Author(s)
Zhang, Sai
Issue Date
2013-02-03T19:36:22Z
Director of Research (if dissertation) or Advisor (if thesis)
Shanbhag, Naresh R.
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Switched capacitor voltage regulator module
Sub/near-threshold operation
Optimization
Low power design
Abstract
Switched capacitor voltage regulator module (SC-VRM) is suitable for low power embedded systems operating in near/sub-threshold region due to its high conversion ratio and compactness. However, existing optimization for SC-VRM is separated from the embedded core design and therefore leads to sub-optimal system energy efficiency. In this thesis, we propose to jointly optimize the switched capacitor voltage regulator module (SC-VRM) and the compute core to minimize system energy per instruction. A core-aware SC-VRM energy model is developed and employed to solve the joint optimization problem. We also propose and optimize a reconfigurable SC-VRM architecture. Simulation results in a 130nm CMOS process indicate that the core-aware SC-VRM model predicts energy from circuit simulations to within 5%, and that the proposed approach results in a maximum system energy savings of 8% to 38.9%. The reconfigurable SC-VRM achieves 15% to 52% energy saving as compared to an efficiency-optimized design.
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