Adaptive reliability chipkill correct (ARCC)

Jian, Xun

Permalink

https://hdl.handle.net/2142/46653 Copy

Description

Title

Adaptive reliability chipkill correct (ARCC)

Author(s)

Jian, Xun

Issue Date

2014-01-16T17:57:37Z

Director of Research (if dissertation) or Advisor (if thesis)

Kumar, Rakesh

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

M.S.

Degree Level

Thesis

Keyword(s)

• Error checking and correcting (ECC)
• Memory
• Reliability
• Reconfigurable
• Chipkill Correct

Abstract

Chipkill correct is an advanced type of error correction in memory that is popular among servers. Large field studies of memories have shown that chipkill correct reduces uncorrectable error rate by 4X to 36X compared to the weaker Single Error Correct Double Error Detect (SECDED). Currently, there is a strong tradeoff between power and reliability among different chipkill correct solutions. For example, commercially available chipkill correct solutions that can detect up to two failed devices and correct one failed devices require accessing 36 memory devices per memory request. However, a weaker single chipkill correct single chipkill detect solution only requires accessing 18 devices per memory request and, therefore, consumes much lower memory power. In this research, we present Adaptive Reliability Chipkill Correct (ARCC) — an optimization to be applied to existing chipkill correct solutions to allow them to incur the low power consumption of a lower strength chipkill correct solution while maintaining similar reliability as that of a stronger chipkill correct solution. ARCC is based on the observation that, on average, only a tiny fraction of memory experiences any type of faults during the typical operational lifespan of a server. As such, it proposes relaxing the strength of chipkill correct in the beginning and then adaptively increasing the strength as needed on a page-by-page basis in order to reap the benefit of lower power consumption during the majority of the lifetime of a memory system. Our evaluation shows that ARCC reduces the power consumption of memory by 36%, on average, when applied to commercial chipkill correct, while keeping the storage overhead the same and maintaining similar reliability.

Graduation Semester

2013-12

Permalink

http://hdl.handle.net/2142/46653

Copyright and License Information

Copyright 2013 Xun Jian. IEEE 2013

Owning Collections