Design of low complexity fault tolerance for life critical situation awareness systems

Raguraman, Dhashrath

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https://hdl.handle.net/2142/78789 Copy

Description

Title

Design of low complexity fault tolerance for life critical situation awareness systems

Author(s)

Raguraman, Dhashrath

Issue Date

2015-04-28

Department of Study

Computer Science

Discipline

Computer Science

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

M.S.

Degree Level

Thesis

Keyword(s)

• Cyber Physical Systems
• Fault Tolerance
• Cardiac Resuscitation

Abstract

In cyber-human-medical environments, coordinating supervisory medical systems and medical staff to perform treatment in accordance with best practice is essential for patient safety. However, the dynamics of patient conditions and the non-deterministic nature of potential side effects of treatment pose significant challenges. This work covers my contribution to one such system in development of its low complexity workflow which enhances situation awareness and in the design and implementation of it fault tolerance. In the first part of this document, we cover a validation protocol to enforce the correct execution sequence of treatments, preconditions validation, side effects monitoring and checking expected responses based on patho-physiological models. The proposed protocol organizes the medical information concisely and comprehensively to help medical staff validate treatments.The proposed protocol dynamically adapts to the patient conditions and side effects of treatments. A cardiac arrest scenario is used as a case study to verify the safety properties of the proposed protocol. In the second part of this document, we describe the integration of some well understood fault tolerance strategies in context of safety critical systems. We list out the requirements of our system and explore the traditional Active/Standby in context of certain guiding design principles to fit our specific requirement. Like any software engineering project, we design test suites to ensure QOS. We go a step further and try to make this design verifiable using model checking tools like UPPAAL to demonstrate the correctness of our system architecture under conditions of normal operation and failure.

Graduation Semester

2015-5

Type of Resource

text

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http://hdl.handle.net/2142/78789

Copyright and License Information

Copyright 2015 Dhashrath Raguraman

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