Multi-Bit Delta -Sigma Modulation Technique for Fractional-N Frequency Synthesizers
Rhee, Woogeun
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Permalink
https://hdl.handle.net/2142/81372
Description
Title
Multi-Bit Delta -Sigma Modulation Technique for Fractional-N Frequency Synthesizers
Author(s)
Rhee, Woogeun
Issue Date
2001
Doctoral Committee Chair(s)
Song, Bang-Sup
Department of Study
Electrical Engineering
Discipline
Electrical Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
This thesis proposes a multi-bit Delta-Sigma modulation technique as a spur reduction method to enhance the overall synthesizer performance, and the oversampling modulator performance is analyzed with the consideration of practical design aspects for frequency synthesizers. A prototype fractional- N frequency synthesizer using a 3-b third-order Delta-Sigma modulator has been designed and implemented in 0.5-gm CMOS. Synthesizing 900 MHz with 1-Hz resolution, it exhibits an in-band phase noise of --92 dBc/Hz at 10-kHz offset with a reference spur of less than --95 dBc. Experimental results show that the proposed system is applicable to low-cost, low-power wireless applications and that it meets the requirements of most RF applications including multi-slot GSM, IS-54, CDMA, and PDC.
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