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The Retiming and Routing of VLSI Circuits
Doctoral Committee Chair(s)
Department of Study
Degree Granting Institution
University of Illinois at Urbana-Champaign
"Multi-layer technologies present additional challenges to the routing of the nets because the layer assignment can have a large impact on the net delays. Traditional approaches cause the first few nets to monopolize the ""good"" layers. Therefore, they perform poorly under the metric of minimizing the maximum net delay. We propose the use of dynamic area quotas to remedy this problem. Our approach is independent of the routing model and the router used, and works very well in practice."