System-level design, simulation and measurement for high-speed data links
Yang, Jerry
Loading…
Permalink
https://hdl.handle.net/2142/89204
Description
Title
System-level design, simulation and measurement for high-speed data links
Author(s)
Yang, Jerry
Issue Date
2015-11-23
Director of Research (if dissertation) or Advisor (if thesis)
Schutt-Ainé, José E.
Department of Study
Electrical & Computer Engineering
Discipline
Electrical & Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
High-Speed
Data Links
SerDes
System Design
Interconnect Modeling
Simulation
Measurement
Eye Diagram
Jitter and Noise
Signal Integrity
Embedding
De-embedding
Real-Time Scope
Abstract
The era of the internet-of-things (IOT) is expanding the utilization of mobile and cloud computing to a global scale. The enormous data transport places a huge design overhead in building low-cost, low-power, low-error-rate high-speed data links. This thesis provides a system-level overview of the design, simulation, and measurement of high-speed digital applications in the context of signal integrity. Examples are provided to demonstrate the design approach and trade-offs made to arrive at the results. Modeling and simulation methodologies for high-speed interconnect are discussed and studied, using both conformal mapping and the variational method in closed-form solutions, with examples provided to study the frequency-dependent channel effects in high-speed digital systems. Detailed processes along with examples are presented at the end to illustrate some real-world issues many engineers will face when characterizing and measuring high-speed data links.
Use this login method if you
don't
have an
@illinois.edu
email address.
(Oops, I do have one)
IDEALS migrated to a new platform on June 23, 2022. If you created
your account prior to this date, you will have to reset your password
using the forgot-password link below.
